MNEMOSENE H2020 Project

About MNEMOSENE H2020 Project

MNEMOSENE (receiving funding from the European Union’s Horizon 2020 research and innovation programme under the ICT-31-2017 RIA grant agreement No 780215) is a three year project with the aim of demonstrating a new computer architecture concept based on resistive devices, together with its required programming flow and interface. Specifically, the goals of MNEMOSENE will be to: (1) develop, design and demonstrate the concept of computation-in-memory (CIM) based on resistive-computing using emerging non-volatile memresistive switching devices; and (2) develop and design an efficient compiler, a simulator and FPGA emulator for the new architecture (CIM device combined with a conventional CPU).